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The Non-Predictability of Mispredicted Branches using Timing Information
arxiv.org·15h
🔮CPU Branch Prediction
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SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
danglingpointers.substack.com·1d·
Discuss: Substack
🤝Cooperative Threading
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A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)
semiengineering.com·2h
📏Linear Memory
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MLflow vs Kubeflow vs Airflow: Choosing the Right MLOps Tool for Real-World Production Systems
pub.towardsai.net
·1d
🌪️V8 TurboFan
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AMD Software : Adrenalin Edition 26.1.1
forums.anandtech.com·4h
📊perf Tools
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From Chaos to signal: Taming high-frequency OS events in Go
dev.to·1d·
Discuss: DEV
🐹Go Runtime
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SplittingSecrets: A Compiler-Based Defense for Preventing Data Memory-Dependent Prefetcher Side-Channels
arxiv.org·15h
🧠Memory Models
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Intel to Discontinue Select 12th Gen "Alder Lake-S" & 4th Gen Xeon "Sapphire Rapids" CPUs
techpowerup.com·2h
🏗️CPU Architecture
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One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon
riscv.org·1h
🔧RISC-V
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ANN v3: 200ms p99 query latency over 100 billion vectors
turbopuffer.com·20h·
Discuss: Hacker News
Cache-Aware Algorithms
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Show HN: BackBuild – A framework for sequencing complex software delivery
arcaned.co·9h·
Discuss: Hacker News
🔄Incremental Compilation
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The Story on ISPC (Intel SPMD Program Compiler)
pharr.org·1d·
Discuss: Hacker News
🔀SIMD Programming
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Scalable Adaptive Memory Compiler Optimization via Multi-Objective Evolutionary Algorithms
dev.to·18h·
Discuss: DEV
🧠Memory Hierarchy
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RUSTSEC-2026-0004: triton-vm: Triton VM Soundness Vulnerability due to Improper Sampling of Randomness
rustsec.org·8h
⚙️TOML Parsers
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Clockworker: single-threaded async executor with powerful scheduling to sit on top of async runtimes
github.com·1d·
Discuss: r/rust
⏱️Async Runtimes
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Adjusting One Line Of Linux Code Yields 5x Wakeup Latency Reduction For Modern Xeon CPUs
phoronix.com·9h
Instruction Fusion
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6 PC habits that secretly slow your system down
xda-developers.com·1d
🔮Branch Predictors
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Making an LSP for great good
thunderseethe.dev·20h·
Gleam
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The fix for a segfault that never shipped
recall.ai·1d·
Discuss: Hacker News
🔧Error Recovery
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Are your CI/CD pipelines accidentally increasing technical debt?
thenewstack.io·1d
🔮CPU Branch Prediction
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